A key Electronic Contract Manufacturing service that Altron provides is design for testability. Designing for testability helps assure that the product can be fully tested during the manufacturing process and final testing. With the proper testing strategies, an electronic contract manufacturer can gain in-process feedback as well as insure that the final product meets all functional and electronic specifications.


Test Pad Spacing

  • Test Probe Pads will be a minimum of .100 inches apart, pad center to pad center.
  • Test Pad Centerlines must be located a minimum of .200 inches from the edge of components over .200 inches high.
  • Test Pads near components less than .200 high should be placed so that the centerline of the pad is located a minimum of .060 inches away from the component.

Tooling Requirements

  • Provide two tooling holes .125 inch diameter with a tolerance of +/-.002 hole to hole.
  • The tooling holes must be diagonally opposite each other and include a component free area of   .125 annular radius.
  • Tolerance of tooling hole diameter should be +/-.003 inches.
  • Tooling hole to probe pad tolerance should be +/-.002 inches.

Component Placement

  • Component should not be placed within .150 inches (prefererably .250 inches) from the edge of the board.
  • There should be a .125 inch annulus free of components and test pads around tooling holes.

Test Pads

  • A minimum of one and preferably two test points per node.
  • A minimum of three test points per power node and 1 additional test point per every ½ amp being used.
  • Ground test points should have a minimum of 2 test points or 1 per square inch.
  • Components or component leads should never be used as a test probe point.
  • Avoid heavy concentrations of test probes in any one area.
  • A minimum pad size of .035 inches should be used for test probe points.


Test Node Determination

  • Method 1 –  For boards under 200 nodes or less than 50 IC’s the best technique would be to add a test pad or via for every node as the parts are being placed for layout. This will ensure full testability.
  • Method 2 – Layout the board initially without any regards for testability. Before design rule checking is done, test points that occur naturally by placing them in convenient locations. Based on a number of studies, the maximum number of test points to be added would usually be less than 150 and there would be very little redundancy.

Method 1

  •      Assured Testability
  •      Node Identification in the Beginning
  •      Control over Test Point Location
  •      Test Point Stability
  •      More Vias than Necessary
  •      Requires More Board Area for Routing if Dense
  •      Extra Time to Place Pads


There are 3 major characteristics of SMT boards that have an impact on test strategy:

  • Production process may include additional steps which naturally will lead to more faults.
  • SMT boards will typically be more complex than through-hole boards. The component placement will be more dense and there can be more components on a board.
  • The fault types of an SMT process will affect the test strategy.